FX465 product information cml semiconductor products publication d/465/2 may 1996 advance information FX465 brief description the FX465 is a 3-volt, half-duplex predictive continuous tone controlled squelch system (ctcss) encoder/decoder microcircuit. the FX465 has integral voice-band filtering for prefiltering of tx audio and the rejection of the ctcss tone in receive. under processor control, the FX465 will encode and decode any one of 47 sub-audio frequencies (+n otone ) in the range 67.0hz to 254.1hz. tone frequencies and all functional commands can be loaded to the device in either pin-selectable 8-bit parallel or serial format. a separate, rx/tx voice-audio path is available with a highpass (sub-audio reject) filter automatically placed in the relevant rx or tx voice line. the rx sub-audio (ctcss) path contains a (selected tone frequency) bandpass filter and period detector providing a logic level output (rx tone detect) to indicate a successful decode operation. rx press to listen (ptl) and tx squelch-tail elimination functions are available in both command loading modes. the squelch-tail elimination function will provide (tx tone) phase-reversal to minimise the annoying audio outputs that occur at the receiver on completion of a transmission. tone frequencies and filter accuracies are maintained by an on-chip 4.0mhz clock oscillator employing an external crystal or clock pulse input. the FX465, which exhibits high audio and sub-audio performance with low falsing, is available in a 24-pin plastic small outline ssop package. fig.1 functional block diagram extended code ctcss encoder/decoder new ssop d5 package features low-voltage (3-volt) supply 47 programmable sub-audio tones + n otone meets mpt1306 and tia/eia 603 high voiceband/ctcss isolation separate sub-audio and rx/tx audio paths and filtering applications mobile radio systems community base stations sports radio (japan) sub-audio signalling and selective calling status and alarm systems amateur radio load/latch d2/serial clock d0 clks clks clks/xtal clks/xtal tx tone out v dd rx tone detect a0 - a5 d0 - d10 tone detect logic reference voltage tone rom 48 x 10 tone decode filter tone in filter tone out filter audio filter clk xtal/clock d5/serial enable tone in d4/serial enable d1 ptl rx audio in decode comparator in rx audio out rx tone decode tx audio in decode comparator ref tx audio out d3/serial data in tone rx/tx xtal digital interface and clock generation f - + - + - + v ss v bias
2 pin number function v dd : positive supply. xtal/ciock: input to the on-chip inverter; used with a 4.0mhz xtal or external clock source. xtal: output of the on-chip inverter (clock output). load/latch: controls 8 on-chip latches and is used to latch rx/tx, ptl, d 0 - d 5 . this pin is internally pulled to v dd . a logic 1 applied to this input puts the 8 latches into a 'transparent' mode. a logic 0 applied to this input puts the 8 latches into the latched mode. in parallel mode data is loaded and latched by a logic 1 to 0 transition (see figure 4). in serial mode data is loaded and latched by a 0 to 1 to 0 strobe pulse on this pin (see figure 4). d 5 /serial enable: data input d 5 (parallel mode); serial enable (serial mode). a logic l applied to this input, together with a logic 0 applied to d 4 /serial enable, will put the device into 'serial mode' (see figure 4). this pin is internally pulled to v dd . d 4 /serial enable: data input d 4 (parallel mode); serial enable (serial mode). a logic 0 applied to this input, together with a logic 1 applied to d 5 /serial enable, will place the device into serial mode (see figure 4). this pin internally pulled to v dd . d 3 /serial data in: data input d 3 (parallel mode); serial data input (serial mode). in serial mode this pin becomes the serial data input for d 5 - d 0 , rx/tx, ptl (see figure 4). d 5 is clocked-in first and ptl last. this pin internally pulled to v dd . d 2 /serial clock: data input d 2 (parallel mode); serial clock input (serial mode). in serial mode this pin becomes the serial clock input. data is clocked on the positive-going edge (see figure 4). this pin is internally pulled to v dd . d 1 : data input d 1 (parallel mode); not used (serial mode). this pin is internally pulled to v dd . d 0 : data input d 0 (parallel mode); not used (serial mode). this pin is internally pulled to v dd . v ss : negative supply. decode comparator ref. (i/p) : internally biased to v dd /3 or 2v dd /3 via 1.0m w resistors depending on the logical state of the rx tone decode pin. rx tone decode = logic 1 will bias this input to 2v dd /3, a logic 0 will bias this input to v dd /3. this input provides the decode comparator reference voltage; switching of bias voltages provides hysteresis to reduce 'chatter' under marginal conditions. FX465 d5 1 2 3 4 5 6 7 8 9 10 11 12
3 pin number function FX465 d5 13 14 15 16 17 18 19 20 21 22 23 24 rx tone decode (o/p) : the gated output of the on-chip decode comparator. this output is used to gate the rx audio path. a logic 0 on this pin indicates a successful decode and that the decode comparator in pin is more positive than the decode comparator ref. input (see table 1). decode comparator in: the inverting input of the decode comparator. this pin is normally connected to the integrated output of the rx tone detect pin. rx tone detect (o/p) : in the rx mode this output will go to a logic 1 during a successful decode (table 1). this must be externally integrated to control response and deresponse times (figure 2). tx tone out: the ctcss sinewave output appears on this pin under the control of the rx/tx pin. this output, when not transmitting a sub-audio tone, may be biased to v dd /2 as described in table 1. rx/tx: this input (parallel mode) selects rx or tx modes (see figure 2). logic 1 = rx; logic 0 = tx. in serial mode this (rx or tx) function is serially loaded. this pin is internally pulled to v dd via a 1m w resistor. ptl: a dual-function input. in parallel rx mode this pin operates as a push to listen function by enabling the rx audio path, thus overriding the tone-squelch function. in the parallel load mode, tx operation this input reverses the phase of the transmitting ctcss tone (squelch tail elimination). in the serial load mode (rx and tx) these functions are serially loaded. internal pull-up to v dd . rx audio out: the high-pass filtered received audio output. this pin outputs audio when rx tone decode = 0, or ptl = 1 or when notone is programmed (table 2). in tx mode this pin is biased to v dd /2. tx audio out: the high-pass filtered transmit audio output. in tx mode this pin outputs audio present at the tx audio input by opening the tx audio path. in rx mode this pin is biased to v dd /2. v bias : the output of the on-chip analogue bias circuitry. held internally at v dd /2, this pin should be externally decoupled to v ss via a capacitor. tx audio in: the tx audio input pin. tx voice-band audio may be prefiitered, using the audio path, thus helping to avoid talk-off due to the intermodulation of speech frequencies with the transmitted ctcss tone. this pin is internally biased to v dd /2. rx audio in: the input to the audio high-pass filter in the rx mode. this pin is internally biased to v dd /2. tone in: the input to the ctcss tone detector; this input is internally biased to v dd /2.
4 application information external components component value tolerance r 1 1.0m w 10% r 2 560k w 10% r 3 820k w 10% c 1 0.1f 20% c 2 18pf 20% c 3 33pf 20% c 4 0.1f 20% c 5 0.1f 20% c 6 0.47f 20% c 7 0.1f 20% c 8 0.1f 20% c 9 0.1f 20% c 10 0.1f 20% c 11 0.1f 20% d 1 small signal type x 1 4.0mhz 0.01% note: the values specified for r 1 , c 2 and c 3 have been found to be satisfactory when used with a crystal (x 1 ) whose equivalent series resistance is <= 1000 ohms. the crystal manufacturer should be consulted to determine optimum values for different crystals. the 0.1f value for the dc blocking capacitors c 4 , c 5 , c 7 , c 8 , c 9 , c 10 and c11 are not a requirement. for the capacitors c 4 , c 5 and c 10 , the input impedance is internal to the device and specified as typically 550k w . for the remaining capacitors external circuits will be important in determining input impedance. input pin condition output pin condition result and/or function decode tone tx audio tone rx audio comp. rx tone rx tone tx path decoder path d 0 to d 5 rx/tx ptl input detect decode enabled enabled enabled enabled notes t one 00 x 01 y es y es n o n o ( bias )1 n otone 0 xx 01 n o ( bias )y es n o n o ( bias )2 t one 10 0 0 1 n o ( bias )n o y es n o ( bias )3 t one 11 0 0 1 n o ( bias )n o y es y es 4 t one 1 x 110n o ( bias )n o y es y es 5 n otone 1 xx x 0n o ( bias )n o y es y es 6 n otes 1 normal tone transmit condition. 2n otone programmed in tx mode; tone transmit output set to v dd /2. tx audio path enabled. 3 normal decode standby. 4 normal decode standby with ptl used to enable audio. 5 normal decode of correct ctcss tone condition; ptl has no effect. 6n otone programmed in rx mode; tone transmit output ( bias ). rx audio path enabled. table 1 combinations of input/output conditions x = don't care fig.2 recommended external components
5 application information ...... description voice on shared radio channels is multiplexed with a subaudible ctcss (continuous tone controlled subaudible squelch) tone as a means of directing messages among user groups sharing the same rf frequencies. ctcss modulates the transmitter with a discrete tone, from 39 standard ctcss tones in the range (67.0hz to 250.0hz) accord- ing to tia/eia-603. there are an additional eight ctcss tones not specified in tia/eia-603 that the FX465 will encode and decode. they are: 159.8hz, 183.5hz, 189.9hz, 196.6hz, 199.5hz, 206.5hz, 229.1hz, and 254.1hz, for a total of 47 ctcss tones plus n otone . the FX465 also incorporates tx/rx on chip speech filters. in early ctcss designs, tx speech was not filtered from the ctcss tone, rather the filtering was dependent upon the host transmitter?s pre-emphasis network. at only 6db/ octave, the attenuation of speech components at higher ctcss tones was only a few db which resulted in talk-off (low frequency voice components unsquelching the receiver audio). tia/eia-603 nominal FX465 freq. freq. d d d d d fo % d 5 d 4 d 3 d 2 d 1 d 0 hex 67.0 66.98 -0.029 1 1 1 1 1 1 3f 69.3 69.32 0.024 1 1 1 0 0 1 39 71.9 71.901 0.001 0 1 1 1 1 1 1f 74.4 74.431 0.042 1 1 1 1 1 0 3e 77.0 76.965 -0.046 0 0 1 1 1 1 0f 79.7 79.677 -0.029 1 1 1 1 0 1 3d 82.5 82.483 -0.021 0 1 1 1 1 0 1e 85.4 85.383 -0.020 1 1 1 1 0 0 3c 88.5 88.494 -0.007 0 0 1 1 1 0 0e 91.5 91.456 -0.048 1 1 1 0 1 1 3b 94.8 94.76 -0.042 0 1 1 1 0 1 1d 97.4 97.435 -0.036 1 1 1 0 1 0 3a 100.0 99.96 -0.040 0 0 1 1 0 1 0d 103.5 103.429 -0.069 0 1 1 1 0 0 1c 107.2 107.147 -0.05 0 0 1 1 0 0 0c 110.9 110.954 0.049 0 1 1 0 1 1 1b 114.8 114.84 0.035 0 0 1 0 1 1 0b 118.8 118.793 -0.006 0 1 1 0 1 0 1a 123.0 123.028 0.023 0 0 1 0 1 0 0a 127.3 127.328 0.022 0 1 1 0 0 1 19 131.8 131.674 -0.095 0 0 1 0 0 1 09 136.5 136.612 0.082 0 1 1 0 0 0 18 141.3 141.323 0.016 0 0 1 0 0 0 08 146.2 146.044 -0.107 0 1 0 1 1 1 17 151.4 151.441 0.027 0 0 0 1 1 1 07 156.7 156.875 0.112 0 1 0 1 1 0 16 * 159.8 159.936 0.085 1 1 0 0 0 1 31 162.2 162.311 0.069 0 0 0 1 1 0 06 167.9 167.708 -0.114 0 1 0 1 0 1 15 173.8 173.936 0.078 0 0 0 1 0 1 05 179.9 179.654 -0.137 0 1 0 1 0 0 14 * 183.5 183.680 0.098 1 1 0 0 1 0 32 186.2 186.289 0.048 0 0 0 1 0 0 04 * 189.9 190.069 0.089 1 1 0 0 1 1 33 192.8 192.864 0.033 0 1 0 0 1 1 13 * 196.6 196.329 -0.138 1 1 0 1 0 0 34 * 199.5 199.312 -0.094 1 1 0 1 0 1 35 203.5 203.645 0.071 0 0 0 0 1 1 03 * 206.5 206.207 -0.142 1 1 0 1 1 0 36 210.7 210.848 0.070 0 1 0 0 1 0 12 218.1 217.853 -0.113 0 0 0 0 1 0 02 225.7 225.339 -0.160 0 1 0 0 0 1 11 * 229.1 229.279 0.078 1 1 0 1 1 1 37 233.6 233.359 -0.103 0 0 0 0 0 1 01 241.8 241.970 0.070 0 1 0 0 0 0 10 250.3 250.282 -0.007 0 0 0 0 0 0 00 * 254.1 254.162 0.024 1 1 1 0 0 0 38 n otone 11000030 serial input mode 1 0 data clock x x 2x * not specified in the tia/eia-603 tone set. table 2 tone programming information ctcss programming table (all frequencies in hertz (hz)
6 application information ...... fig.4 serial and parallel timing diagrams fig.3 frequency response: rx audio path
7 specification absolute maximum ratings exceeding the maximum rating can result in device damage. operation of the device outside the operating limits is not implied. supply voltage -0.3 to 7.0v input voltage at any pin (ref v ss = 0v) -0.3 to (v dd + 0.3v) sink/source current (supply pins) +/- 30ma (other pins) +/- 20ma total device dissipation @ t amb 25c 550mw max. derating 9mw/c operating temperature range: FX465 d5 -40c to +85c storage temperature range: FX465 d5 -55c to +125c operating limits all device characteristics are measured under the following conditions unless otherwise specified: v dd = 3.3v to 5.0v. v ss = 0v. t amb = 25c. xtal/clock = 4.0mhz 100ppm. 0db ref: = 750mvrms (proportional to v dd , see note 16.) composite signal = 1.0khz test tone at 300mvrms, noise at 75mvrms (gaussian white noise, band-limited to 6.0khz), programmed ctcss tone at 30mvrms, fo = 100hz. characteristics see note min. typ. max. unit static characteristics supply voltage (v dd ) 2.7 3.3/5.0 5.5 v supply current v dd = 5.0v - 3.7 4.2 ma v dd = 3.3v - 1.3 1.6 ma analogue input impedance - 0.55 - m w analogue output impedance - 0.45 - k w digital input impedance 1 - 35.0 - k w input logic 1 1 70.0 - - %v dd input logic 0 1 - - 30.0 %v dd output logic 1, source = 0.1ma 2 80.0 - - %v dd output logic 0, sink = 0.1 ma 2 - - 20.0 %v dd dynamic characteristics decoder pure tone decode threshold - 7.0 15.0 mvrms composite tone decode threshold 3 - - 30.0 mvrms decode input signal level 15 -20.0 - 3.5 db pure tone decode response time 12, 13 95.0 115 140 ms pure tone decode de-response time 12, 14 95.0 130 170 ms decode response time 3, 6, 9 - - 250 ms de-response time 3, 9 - 180 250 ms decode selectivity: decode bandwidth 3, 10 upper decode band edge 1.005fo 1.015fo 0.995fo+1 hz lower decode band edge 1.005fo-1 0.985fo 0.995fo hz encoder tone output level 11 -1.0 0 1.0 db tx tone frequency accuracy (f o error) -0.3 - +0.3 %f o risetime to 90% (nominal output) f o > 100hz 4, 9 - 15.0 75 ms f o < 100hz 4, 9 - 45.0 120 ms total harmonic distortion - 1.5 2.0 % audio filter total harmonic distortion 5, 7 - 1.5 2.0 % output noise level 7 - 0.5 - mvrms (input ac short cct, audio switch enabled) sinad 7, 8 40.0 50.0 - db spurious emissions - - -48 db cut-off frequency - 300 - hz bandpass ripple (300hz C 3000hz) 5, 7 - 1.0 1.8 db stopband attenuation <250hz 5, 7 33.0 36.0 - db passband gain at 1.0khz -0.5 0 0.5 db
characteristics see note min. typ. max. unit specification ...... audio switch isolation 5 - 60.0 - db serial/parallel inputs parallel set-up time (t sp ) 400 - - ns load/latch pulse width (t l ) 400 - - ns serial clock pulse width (t c ) 400 - - ns serial set-up time (t ss ) 400 - - ns serial data hold time (t h ) 400 - - ns serial enable time (t 1 ) 400 - - ns serial load/latch set-up time (t 2 ) 400 - - ns serial clock frequency - 1.0 - mhz notes 1. refers to rx/tx, ptl, decode comparator input, d 0 , d 1 , d 2 , d 3 , d 4 , d 5 inputs. 2. all logic outputs. 3. composite signal test condition. 4. any programming tone and rl = 10k w . cl = 15pf. 5. with an input level of 0db at 1.0khz. 6. f o > 100hz, (for 100hz >f o >67hz: t = (100/f o hz) x 250ms). 7. measured in a 30khz bandwidth. 8. with an input level of -3.5db at 1.0khz 9. per tia/eia-603. 10. per tia/eia-603, device will not decode adjacent tia/eia-603 tones. 11. tone output level is proportional to v dd . 12. f o = 156.7hz at -20db. 13. typically 12.5 tone cycles + 40ms 14. typically 7 tone cycles + 90ms. 15. max composite signal is 3.5db with: noise (band limited 6khz gaussian) -12db to 1khz test tone f 0 ctcss tone -20db ref to 1khz test tone. 16. for maximum dynamic range, set audio level to 0db, v dd x 150mvrms, using minimumv dd under which system is intended to work. e.g. for a 2.7 to 3.3 volt system use 0db equal to 405mvrms. e z l x t pin 1 a b c h p f j y note : all dimensions in inches (mm.) angles in degrees a b c e f h typ. max. min. dim. j p x t y z l 0.078 (1.99) 0.068 (1.73) 0.311 (7.90) 0 7 4 8 9 10 0.037 (0.95) 0.328 (8.33) 0.212 (5.38) 0.026 (0.65) 0.022 (0.55) 0.301 (7.65) 0.286 (7.15) 0.008 (0.21) 0.002 (0.05) 0.005 (0.13) 0.009 (0.22) 0.010 (0.25) 0.015 (0.38) 0.318 (8.07) 0.205 (5.20) FX465 d5 24-pin plastic s.s.o.p. ordering information FX465 d5 24-pin plastic s.s.o.p. (d5) cml does not assume any responsibility for the use of any circuitry described. no circuit patent licences are implied and cml reserves the right at any time without notice to change the said circuitry. package outlines the FX465 is available in the package styles outlined below. pin 1 identification marking is shown on the relevant diagram and pins on all package styles number anti-clockwise when viewed from the top. handling precautions the FX465 is a cmos lsi circuit which includes input protection. however precautions should be taken to prevent static discharges which may cause damage.
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